1. Field of the Invention
The present invention pertians to a non-inverting low power, high speed boostrapped buffer for use in address decoders, word line drivers and similar circuits. The circuit features a very fast rise time using low static power, thereby minimizing power dissipation.
2. Description of Related Art
The closest prior art circuit known to the inventor was disclosed in the Proceedings of the 1983 IEEE International Solid State Circuits Conference, pages 104 ff. Therein is disclosed a 5ns 4KX1 NMOS static RAM which uses a self-restoring bootstrapped driver circuit to provide fast word line access with low deselect power dissipation. That circuit uses an inverter to invert its input. Hence, its input voltage must rise to the inverter threshold. The circuit of the present invention does not require an inverter at the input stage, thus providing less delay and using less power since its input circuit has to rise only to the threshold voltage of the input device before the buffer fires.